1. Field of the Invention
The present invention relates to clock signal generation for reproducing data recorded onto an optical disk, and more particularly, to an apparatus for stably generating a clock signal that is synchronized with an input signal and a method thereof.
2. Description of the Related Art
In general, binary data is recorded onto a surface of an optical disk such as a compact disc (CD) or a digital versatile disc (DVD). The recorded binary data can be reproduced by projecting light such as a laser beam onto the optical disk and reading an optical signal reflected off the optical disk. Since the binary data read from the optical disk is in the form of an analog signal, i.e., a radio frequency (RF) signal, it is necessary to convert the analog signal into a digital signal.
To restore data stored in the optical disk, an analog/digital converter (ADC) and a phase locked loop (PLL) circuit are needed. The PLL circuit synchronizes a system clock signal for restoring digital data with an input signal and outputs the synchronized system clock signal.
FIG. 1 is a block diagram of a general PLL circuit.
The PLL circuit includes a phase detector (PD) 110, a loop filter 120, and a voltage controlled oscillator (VCO) 130.
The PD 110 detects a phase difference between an input signal and a clock signal output from the VCO 130. The detected phase difference is input to the loop filter 120. The loop filter 120 accumulates the detected phase difference, converts the accumulated phase difference into a voltage, and outputs the voltage to the VCO 130. The VCO 130 receives a control voltage signal and generates a clock signal.
FIG. 2 is a block diagram of a general PLL circuit having an additional frequency detector (FD) 140.
In general, the frequency range that can be synchronized by the PLL circuit is limited due to characteristics of the loop filter 120. Actually, the frequency range that can be synchronized by the PLL circuit is remarkably small. When a frequency difference between the clock signal output from the VCO 130 and the input signal is large, the PLL circuit does not operate. Thus, the clock signal output from the VCO 130 cannot be synchronized with the input signal.
To solve such a problem, when the frequency difference between the clock signal and the input signal is large, a frequency detector (FD) 140 is used to match the frequency of the clock signal output from the VCO 130 to the frequency of the input signal, thereby operating the PLL circuit.
The FD 140 can have various configurations. The input signal includes a data signal and a sync signal. In general, the FD 140 is configured to detect an input frequency using a sync signal of a maximum period, included in the input signal. For example, in a case of an optical disk such as a DVD, a data signal of a maximum period of 14T (T denotes a unit period), included in a sync signal, is used to detect the input frequency. When the PLL circuit operates normally, the signal of 14T is detected. However, when a frequency of an oscillating clock signal of the VCO 130 increases or decreases, a signal whose period is smaller or larger than 14T is detected. Thus, the FD 140 detects a signal of the maximum period within a section of the input signal and detects the frequency difference between the detected signal and the input signal based on the difference between the period of the detected signal and the period of 14T.
FIGS. 3A and 3B illustrate a case where an error of an input signal exceeds binary data level.
When the amplitude of the input signal is more than 0 level, it is detected as 1. When the amplitude of the input signal is less than 0 level, it is detected as 0. Recently, as optical disks have increased their recording density, the qualities of reproduced signals are degraded. With degradation of the qualities of reproduced signals, the error of the input signal may exceed the binary level as shown in FIGS. 3A and 3B. In this case, the input signal is not accurately detected, which prevents a signal of the maximum period from being accurately detected. In other words, a section 310, illustrated in FIG. 3A, which is supposed to be detected as 1 in an original signal may be detected as 0 as shown in a section 320, illustrated in FIG. 3B in a distorted signal. As a result, the signal of the maximum period may not be accurately detected.
FIGS. 4A and 4B illustrate loss of input data when an oscillating frequency of the VCO 130 is lowered to ½T.
When the oscillating frequency changes sharply, the FD 140 may experience a malfunction. For example, when a signal of the minimum period among the input signal has a period of 2T, if the oscillating frequency is sharply lowered to below ½T, a signal of 2T may be detected as a signal of below 1T or even as a signal that does not reach 0 level. Thus, the probability of malfunction of the FD 140 that detects the frequency of the maximum period increases. In other words, as shown in FIG. 4B, a data loss section 410 may be generated.